Reconfiguring the boundaries of a mesh-connected array of processors with run-time programmable logic

Abstract: Fine grain mesh-connected arrays of processors with a SIMD architecture are considered an attractive solution for many important and emerging real-time data handling applications that require high speed processing of dynamic data sampled over a bidimensional region. Nevertheless, even if the interconnections between the arrays' adjacent nodes are well suited to those applications that may be handled by neighbour based algorithms, the SIMD computational model is, in general terms, still not flexible. Furthermore, the limited size of economically viable arrays calls for a severe overhead in data transfer and array boundary data handling that may impair the system's efficiency. Without modifying the arrays' internal structure, most algorithms could overcome some of their implementation drawbacks with a flexible, fast switching facility on the array boundary. This article presents a 'boundary processor' based on programmable gate arrays whose aim is to dynamically activate the required boundary interconnection pattern either under software control or through an on-line hardware reconfiguration facility. The device has been designed and implemented at the University of Bologna as part of a computer vision machine for robotic applications. © 1993.

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